[monero-project/monero] Idea for ASIC resistance (#3545)

@tevador Up to 94 clock cycles on Skylake (and *-lake successors), but only up to 46 clock cycles on Ryzen: http://agner.org/optimize/instruction_tables.pdf

Запись редактировалась последний раз: May 30, 2018, 8:58 pm