[monero-project/monero] Idea for ASIC resistance (#3545)

Is there any mileage in doing some operation on that extra memory for which there’s a fast enough CPU instruction, and which would require substantial extra silicon, like a a division ? Those seem to be still slowish on CPU but it might be «hidden» by memory latency ?

Запись редактировалась последний раз: May 30, 2018, 8:15 pm